Future FPGA Projects

SUN SENSOR! I could re-do my lackluster college senior design project with my initial idea- hook up a camera to an fpga and put it in a box. Poke a hole in the box above the camera. Measure the height from the hole to the camera sensor. Each pixel is compared to a brightness threshold. The FPGA compares all the pixels and finds the brightest ones, does some math drawing a line from the brightest pixel to the known 3D coordinates of the pinhole, then calculates the angle of the incoming light beam. An interesting idea here is treating each pixel like its own “class..” with relationships connecting it to it’s neighbors. Each pixel could compare itself to each of its neighbors(Doesn’t even need to, you just need to compare the neighbors!), find the brightest one out of those, and represent it as a direction; a 2D array of these would just be a unit vector map. Other considerations- the pinhole needs to be tiny, probably needs to go through a lens of some kind to dim the intensity (sun from orbit would wash it out and make it impossible to detect anything useful). The inside of the box would need to as matte as possible; no reflections should bounce from the walls onto the sensor. Finding the slowest possible camera speed; something that latches a frame as quickly as possible, but takes its time transmitting the stored frame so that overall frequencies can be kept low

Order of Operations (aka the road to the sun)

1. Mastermind
   1. Design and verify RTL (1 day)
   2. Demo on FPGA (<1 day)
   3. Source HW peripherals- switches, 7 segment displays, big red button, solid state relay for the lock, battery for operation (1 day)
   4. Breadboard and test (2 days)
   5. Decide on layout for the lockbox and components {maybe buy a new lock, but pay attention to electrical specs first?} (1 day)
   6. Source cables, jacks, for peripherals (1 day)
   7. Source FPGA using design size, pin count, and development support as criteria (2 days)
   8. Get intimately familiar with chosen FPGA’s datasheet, dev tools, pinout, quirks. Check that RTL synthesizes for the FPGA, get it prepped to program. (1 week)
   9. Source supporting parts for the FPGA (caps, resist, jtag programmer, oscillator (?), other..?) (2 days)
   10. Choose PCB CAD software (1 day)
   11. Design PCB (3 days)
   12. Order PCB and all parts
   13. Get PCB and parts assembled
   14. Load FPGA and breadboard
   15. Build and test box
   16. $$$
   17. (Notice how there’s less and less information towards the end- expect this to expand upon contact with reality)
2. Poker Lock!
   1. Design SPI master (or download open source one and modify to suit needs
   2. Create state machine to drive the SPI master. Implement and simulate reset and config sequences for the MFRC522 chip, read request and response, program new card,
   3. Get Max10 talking to the MFRC522, implement the above sequences, display the contents of an RFID tag on signal tap
   4. Build system for 5 RFID readers. It’s SPI, so we can share all the pins (ground, miso, mosi, clock, voltage).. just the chip select and IRQ pins are unique.
   5. Solder remaining boards to cat5 cable, use RJ45 jacks to breadboard (board>cable>male jack> female jack w/breadboard pins); breadboard with all 5 sensors. Check crossbleed between sensors, adjust sensitivity as needed.
   6. Repeat Mastermind steps 5 through 15
3. SNES
   1. Dig in to SNES schematics, learn the system
   2. Compare MiSTer RTL to schematics
   3. Create own top-level module for SNES, using IPs from MiSTer.
   4. Breadboard a SNES controller to connect to the DE10-Lite board
   5. Get games running via VGA
   6. Decide on FPGA for PCB build. Rebuild SNES top for new FPGA.
   7. Decide on I/O layouts and programming method, ROM loading style, additional chips on board, and finalize pin count.
   8. Use finalized peripherals to finish RTL, decide on hardware UX support (menus, game select, save states….?) and implement, finalize gate count (If it doesn’t fit, go back to step 6)
   9. Repeat steps 8-13
   10. Program FPGA, play games
4. Guitar Note Detector
   1. ABSTRACT- use a fourier transform to detect the Root frequency of a line in guitar signal, figure out what note that’s closest to. Will need ADC, FFT/DFT, DSP in general. Totally acceptable as a daughter board for an existing main board, can use the RJ45 peripherals if that works for the other projects
5. SUN SENSOR!